Mircea R. Stan
Professor
IEEE Fellow
Contact
Rice Hall - 312
351 McCormick Road
PO Box 400743
Charlottesville, VA 22904-1000
Phone: (434) 924-3503
FAX: (434) 924-8818
Email: mircea@virginia.edu
Summary:
Mircea Stan is teaching and doing research in the areas of high-performance
and low-power very large scale integration (VLSI), temperature-aware circuits
and architecture, embedded systems, and nanoelectronics.
Background:
Mircea R. Stan received the Diploma in electronics and communications
from the Politechnica University, Bucharest, Romania, in 1984 and the M.S. and
Ph.D. degrees in ECE from UMass Amherst, in 1994 and 1996, respectively. Since
1996, he has been with the Charles L. Brown ECE Department, where he is now a
Professor. He has more than eight years of industrial experience, was a
visiting scholar at UC Berkeley in 2004-2005, a visiting faculty member with
IBM in 2000, and with Intel in 2002 and 1999. Dr. Stan received the NSF CAREER
Award in 1997 and was coauthor on Best Paper Awards at ISQED 2008, GLSVLSI
2006, ISCA 2003, and SHAMAN 2002. He was the Chair of the VSA-TC of the IEEE
CAS Society for 2006-2007, the General Chair for the 2006 ISLPED and for the
2004 GLSVLSI, the Technical Program Chair for the 2007 NanoNets and the 2005
ISLPED, on technical committees for numerous conferences, and an Associate
Editor for the IEEE TCAS I from 2004 to 2007 and for the IEEE TVLSI from 2001
to 2003. He also was a distinguished lecturer for the IEEE SSCS Society from
2007 to 2008, and or the IEEE CAS Society from 2004 to 2005. He is a member of
the IEEE, ACM, Eta Kappa Nu, Phi Kappa Phi, and Sigma Xi. He is also the
faculty adviser to the UVa student branch of the IEEE.
Research
The Virginia Nanoelectronics Center (ViNC)
http://www.virginia.edu/uvatoday/newsRelease.php?id=15140
DARPA STT-RAM program
http://www.darpa.mil/Our_Work/MTO/Programs/Spin_Torque_Transfer_Random_Access_Memory_(STT-RAM).aspx
DARPA NV-LOGIC program
http://www.darpa.mil/Our_Work/MTO/Programs/Non_Volatile_Logic_(NV_LOGIC).aspx
Most Recent Publications:
1. Temperature-Aware Architecture: Lessons and Opportunities
W Huang, M Allen-Ware, JB Carter, MR Stan, K Skadron - IEEE Micro, 2011
2. Thermal benefit of multi-core floorplanning: A limits study
K Sankaranarayanan, BH Meyer, MR Stan, K Skadron - Informatics and Systems, 2011
3. Graphene Nanoribbons: from chemistry to circuits
F Tseng, D Unluer, MR Stan, A Ghosh, 2011
4. Experimental demonstration of standby power reduction using voltage stacking in an 8Kb
embedded FDSOI SRAM
A Cabe, MR Stan - GLSVLSI 2011
5. RAMA: a self-assembled multiferroic magnetic QCA for low power systems
M Kabir, MR Stan, SA Wolf, J Lu, GLSVLSI 2011
6. The promise of nanomagnetics and spintronics for future logic and universal memory
SA Wolf, J Lu, MR Stan, E Chen - Proceedings of the IEEE, 2010
7. Exploring the thermal impact on manycore processor performance
W Huang, K Skadron, S Gurumurthi, RJ Ribando, MR Stan - SEMI-THERM 2010
8. Flashpower: A detailed power model for nand flash memory
V. Mohan, S Gurumurthi, MR Stan - DATE 2010
9. Self consistent parameterized physical MTJ compact model for STT-RAM
A Nigam, A Ghosh, S Wolf, E Chen, MR Stan - CAS 2010
10. Stacking SRAM banks for ultra low power standby mode operation
A Cabe, Z Qi, MR Stan - DAC 2010